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Designing with Versal AI Engine 1: Architecture and Design Flow

This course describes the Versal® AI Engine architecture, how to program the AI Engines (single kernel programming and multiple kernel programming using data flow graphs), the data communications between the PL and AI Engines, and how to analyze the kernel program using various debugger features. The emphasis of this course is on: ▪ Illustrating the AI Engine architecture ▪ Designing single AI Engine kernels using the Vitis™ unified software platform ▪ Designing multiple AI kernels using data flow graphs with the Vitis IDE ▪ Reviewing the data movement between AI Engines, between AI Engines via memory and DMA, and between AI Engines to programmable logic (PL) ▪ Analyzing and debugging kernel performance What's New for 2021.2 ▪ Most modules: Added information on AI Engine APIs ▪ Versal ACAP Tool Flow module: Added details on AI Engine development stages and their respective simulation flows and the simulation models used ▪ AI Engine APIs and Intrinsic Functions module: Renamed from "Intrinsic Functions" ▪ The Programming Model: Single Kernel Using Vector Data Types lab: Updated vector kernel with AI Engine APIs ▪ All labs have been updated to the latest software versions