*Confirmed to run! Designing with Versal AI Engine 1: Architecture and Design Flow July 7-8th, 2022

This course describes the Versal® AI Engine architecture, how to program the AI Engines (single kernel programming and multiple kernel programming using data flow graphs), the data communications between the PL and AI Engines, and how to analyze the kernel program using various debugger features. The emphasis of this course is on: ▪ Illustrating the AI Engine architecture ▪ Designing single AI Engine kernels using the Vitis™ unified software platform ▪ Designing multiple AI kernels using data flow graphs with the Vitis IDE ▪ Reviewing the data movement between AI Engines, between AI Engines via memory and DMA, and between AI Engines to programmable logic (PL) ▪ Analyzing and debugging kernel performance What's New for 2022.1 ▪ Added information on AI Engine support for broadcast windows ▪ Added information on external traffic generators ▪ Introduced the upcoming AI Engine-ML architecture ▪ Most modules: Updated the content based on the enhanced programming model ▪ Labs have been updated with the enhanced programming model ▪ All the labs have been updated to the latest software versions .