Designing with the Versal ACAP: NoC
This course introduces the Versal™ ACAP network on chip (NoC) to users familiar with Xilinx devices. Besides providing an overview of the major components in the Versal device, the course illustrates how the NoC is used to efficiently move data within the device. The emphasis of this course is on: ▪ Enumerating the major components comprising the NoC architecture in the Versal ACAP ▪ Implementing a basic design using the NoC ▪ Configuring the NoC for efficient data movement
Course details with outline, daily schedule and prerequisites.
Currently Scheduled Classes
Designing with the Versal ACAP: NoC March 19th, 2021 Online
Title: Designing with the Versal ACAP: NoC
Date/Duration: March 19th 2021
Times: 9 AM - 5 PM CST daily
Location: Online