Introduction to the Zynq SoC Architecture
This course provides hardware and firmware engineers with the knowledge to effectively utilize a Zynq System on a Chip (SoC). It covers the architecture of the ARM® Cortex-A9 processor-based processing system (PS) and the integration of programmable logic (PL).
The course also details the individual components that comprise the PS, I/O peripherals, timers, and caching, as well as the DMA, interrupt, and memory controllers. Emphasis will be placed on effective access and usage of the PS DDR controller from PL user logic, efficient PL-to-PS interfacing, and design techniques.
Course details with outline, daily schedule and prerequisites.