Introduction to the Zynq SoC Architecture

INTRO-ZARCH

Course Description

This course provides hardware and firmware engineers with the knowledge to effectively utilize a Zynq® System on a Chip (SoC). It covers the architecture of the ARM® Cortex™-A9 processor-based processing system (PS) and the integration of programmable logic (PL). The course details the individual components that comprise the PS: I/O peripherals, timers, caching, DMA, interrupt, and memory controllers. Emphasis is placed on effective access and usage of the PS DDR controller from PL user logic, efficient PL-to-PS interfacing, and design techniques, tradeoffs, and advantages of implementing functions in the PS or the PL. 

Level: Embedded Hardware and Firmware 3
Course Duration: 1 day
Price: $800 or 8 Xilinx Training Credits
Course Part Number: INTRO-ZARCH
Who Should Attend?: Hardware and firmware engineers who are interested in implementing a system on a chip using the Zynq SoC and programmable logic.
Registration: Register online in our secure store

Prerequisites

  • FPGA design experience
  • Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
  • Basic understanding of C programming
  • Basic understanding of microprocessors
  • Some HDL modeling experience

Software Tools

  • Xilinx® Design Suite: Embedded or System Edition 2018.1

Hardware

  • Architecture: Zynq-7000 SoC*
  • Demo board: Zynq-7000 SoC ZC702 or Zed board*

* This course focuses on the Zynq-7000 SoC. Contact us for the specifics of the in-class lab board or other customizations.

After completing this comprehensive training, you will have the necessary skills to:

  • Describe the architecture and components that comprise the Zynq SoC processing system (PS)
  • Evaluate a processing system (PS) and programmable logic (PL) AXI interface
  • Identify the configuration options for the Zynq SoC

Course Outline

  • Overview {Lecture, Demo}
  • Application Processor Unit (APU) {Lecture, Lab}
  • Processor Input/Output Peripherals {Lecture, Demo}
  • PS-PL Interface {Lecture, Demo, Lab}
  • Booting {Lecture, Lab}
  • Memory Resources {Lecture, Demo}

Topic Descriptions

  • Overview – Provides a general overview of the Zynq SoC.
  • Application Processor Unit (APU) – Explores the individual
    components that comprise the APU.
  • Processor Input/Output Peripherals – Introduces the components
    that comprise the IOP block of the Zynq device PS.
  • PS-PL Interface – Describes in detail the PS interconnect and
    how it affects PL architecture decisions.
  • Booting – Explains the boot process of the PC and configuration
    of the PL.
  • Memory Resources – Explains the operation of the on-chip
    (OCM) memory and various memory controllers located in the PS

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Scheduled Embedded Courses

Zynq UltraScale+ MPSoC
October 26 - October 28: 09:00 am - 05:00 pm
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC...

Designing w/the DFX Using the Vivado Design Suite
October 28 - October 29: 09:00 am - 05:00 pm
Check with your local Authorized Training Provider for the specifics of the in-class lab board or...

Designing with the IP Integrator Tool
November 03 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have the necessary skills to:▪ Describe the...

Designing with the Versal ACAP: Architecture & Methodology
November 15 - November 17: 09:00 am - 05:00 pm
 After completing this comprehensive training, you will have thenecessary skills to:▪ Describe...

Zynq UltraScale+ MPSoC
November 16 - November 18: 09:00 am - 05:00 pm
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC...

(Workshop) Embedded & Accelerating Applications w/Vitis Unified Software
November 18 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to: ▪ Implement...

Designing with Versal AI Engine 2:Graph Programming w/AI Engine Kernels
November 30 - December 01: 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to:▪ Describe the...

Embedded Design with PetaLinux Tools
December 09 - December 10: 09:00 am - 05:00 pm
Level: Embedded Software 4 Course Duration: 2 days Price: $1600 or 16 Xilinx Training Credits...

Zynq UltraScale+ MPSoC
December 14 - December 16: 09:00 am - 05:00 pm
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC...

Designing with the Versal ACAP: PCI Express System
December 16 - December 17: 09:00 am - 05:00 pm
Course OutlineDay 1 ▪ Introduction to PCI ExpressIntroduces the course and discusses a few key...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.