Embedded Systems Design

Embedded Systems Design 

Course Description

Learn general embedded concepts, tools, and techniques using the Vivado Design Suite.
The emphasis is on:
▪ Designing, expanding, and modifying embedded systems utilizing the features and capabilities of the Zynq® System on a Chip (SoC), Zynq UltraScale+™ MPSoC, or MicroBlaze™ soft processor
▪ Adding and simulating AXI-based peripherals using bus functional model (BFM) simulation

Level: Embedded Hardware 3 
Course Duration: 2 days
Price: $1600 or 16 Xilinx Training Credits
Course Part Number: EMBD-HW
Who Should Attend?: Engineers who are interested in developing embedded systems with the Xilinx Zynq All Programmable SoC, Zynq UltraScale+ MPSoC and/or MicroBlaze soft processor core.


Registration: Register online in our secure store

Prerequisites

  • FPGA design experience
  • Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx Vivado software implementation tools
  • Basic understanding of C programming
  • Basic understanding of microprocessors
  • Some HDL modeling experience

Software Tools

  • Vivado Design or System Edition 2020.1

Hardware

Architectures: Zynq-7000 SoC (Cortex™-A9 processor), Zynq UltraScale+ MPSoC (Cortex-A53 and Cortex-R5 processors), and MicroBlaze processor* 

Demo board: Zynq UltraScale+ ZCU104 board*

After completing this comprehensive training, you will have the necessary skills to:

 

  • Describe the various tools that encompass a Xilinx embedded design 
  • Rapidly architect an embedded system containing a CortexA9/A53/R5 or MicroBlaze processor using the Vivado IP integrator and Customization Wizard 
  • Develop software applications utilizing the Eclipse-based Software Development Kit (SDK) 
  • Create and integrate an IP-based processing system component in the Vivado Design Suite 
  • Design and add a custom AXI interface-based peripheral to the embedded processing system 
  • Simulate a custom AXI interface-based peripheral using VIP

Course Outline 2020.1

Day 1

 Embedded UltraFast Design Methodology
Outlines the different elements that comprise the Embedded
Design Methodology. {Lecture, Demo}
▪ Overview of Embedded Hardware Development
Overview of the embedded hardware development flow. {Lecture,Demo}
Driving the IP Integrator Tool
Describes how to access and effectively use the IPI tool. {Lecture,Lab}
Overview of Embedded Software Development
Reviews the process of building a user application. {Lecture}
▪ Driving the SDK Tool
Introduces the basic behaviors required to drive the SDK tool to generate a debuggable C/C++ application. {Lecture, Lab}
AXI: Introduction
Introduces the AXI protocol. {Lecture}
AXI: Variations
Describes the differences and similarities among the three primary AXI variations. {Lecture}
▪ AXI: Transactions
Describes different types of AXI transactions. {Lecture, Lab,Demo}
Introduction to Interrupts
Introduces the concept of interrupts, basic terminology, and generic implementation. {Lecture}
Interrupts: Hardware Architecture and Support
Reviews the hardware that is typically available to help implement and manage interrupts. {Lecture}
 

 Day 2

AXI: Connecting AXI IP
Describes the relationships between different types of AXI interfaces and how they can be connected to form hierarchies.
{Lecture, Demo}
Creating a New AXI IP with the Wizard
Explains how to use the Create and Import Wizard to create and package an AXI IP. {Lecture, Lab}
▪ AXI: BFM Simulation Using Verification IP
Describes how to perform BFM simulation using the Verification IP. {Lecture, Lab}
MicroBlaze Processor Architecture Overview
Overview of the MicroBlaze microprocessor architecture. {Lecture, Lab}
MicroBlaze Processor Block Memory Usage
Highlights how block RAM can be used with the MicroBlaze processor. {Lecture}
▪ Zynq-7000 SoC Architecture Overview
Overview of the Zynq-7000 SoC architecture. {Lecture, Demo,Lab}
▪ Zynq UltraScale+ MPSoC Architecture Overview
Overview of the Zynq UltraScale+ MPSoC architecture. {Lecture,Demo, Lab} 

 PDF version of this page.

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Scheduled Embedded Courses

Designing FPGAs Using the Vivado Design Suite 1
October 01 - October 02: 09:00 am - 05:00 pm
This course demonstrated timing closure techniques, such are baselining, pipelining,synchronization...

Migrating to Vitis Embedded Software Development IDE
October 07 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to:▪ Develop and...

Zynq UltraScale+ MPSoC
October 20 - October 22: 09:00 am - 05:00 pm
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC...

Embedded Design with PetaLinux Tools
October 27 - October 28: 09:00 am - 05:00 pm
Provides embedded systems developers with experience in creating an embedded Linux system targeting...

Designing FPGAs Using the Vivado Design Suite 2
November 09 - November 10: 09:00 am - 05:00 pm
This course shows you how to build an effective FPGA design using synchronous design techniques,...

Accelerating Applications with the Vitis Unified Software Environment
November 12 - November 13: 09:00 am - 05:00 pm
Learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™...

(Workshop) Embedded & Accelerating Applications w/Vitis Unified Software
November 16 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to: ▪ Implement...

Zynq UltraScale+ MPSoC
December 01 - December 03: 09:00 am - 05:00 pm
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC...

Designing FPGAs Using the Vivado Design Suite 3
December 07 - December 08: 09:00 am - 05:00 pm
This course demonstrated timing closure techniques, such are baselining, pipelining,synchronization...

Zynq SoC System Architecture
December 09 - December 10: 09:00 am - 05:00 pm
* This course focuses on the Zynq-7000 SoC. Check with your local Authorized Training Provider for...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.