Zynq UltraScale+ MPSoC

EMBDZUPMPSoC

Course Description
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family.

What's New for 2020.1

 All labs have been ported to target the Zynq UltraScale+ MPSoC ZCU104 board
 Linux Application Development and Debugging lab: Support for debugging an application through tcf-agent added

Level: Embedded System Architect 3

Course Duration: 3 days

Price: $2400 or 24 Xilinx Training Credits
Course Part Number: EMBDZUP3

•Who Should Attend? – System architects, hardware designers and software developrs interested in understanding the capabilities and ecosystem of the Zynq UltraScale+ MPSoC device.

Prerequisites
 Suggested: Understanding of the Zynq-7000 architecture
 Familiarity with embedded operating systems
Software Tools
 Vivado® Design Suite 2020.1
    May require special Zynq UltraScale+ MPSoC family license
Hardware emulation environment:
○ VirtualBox
○ QEMU
○ Ubuntu desktop
○ PetaLinux
Hardware
 Zynq UltraScale+ MPSoC ZCU104 board


Registration: Register online in our secure store

Course Outline 2020.1

Day 1

Zynq UltraScale+ MPSoC Application Processing Unit
 Overview
 Cortex A-53 Processor
 Architecture Extensions
 64-bit architecture features
 Exception handling
 Cache coherency
Zynq UltraScale+MPSoC Real-Time Processing Unit
    Introduction
 L1 and L2 Caches
 Clocking, Power and Reset
 TCM Architecture
 TCM Software
AXI
 Introduction
 Variations
    Transactions
Zynq Ultrascale+ MPSOc System Protection
 System Memory Management Unit
 Peripheral Protection Unit
 Memory Protection Unit
Zynq UltraScale+ MPSoC Clocks and Resets
 Clocking
 PS Resets
Zynq UltraScale+ MPSoC PMU
 Introduction
 Hardware Architecture
 PMU and the IPI
 Zynq UltraScale+ MPSoC PMU
Zynq UltraScale+ MPSoC Booting
 Boot and Configuration
 Boot Image
 First Stage Boot Loader (FSBL)

Day 2

 ARM TrustZone Technology

 Overview
 TrustZone Firmware
 TrustZone Hardware
QEMU
 Introduction
 Launching
 Bare-Metal Application Development and Debugging
 Linux Application Development and Debugging
Zynq UltraScale+ MPSoC HW-SW Virtualization
 Hypervisors: Introduction
    Virtualization Hardware Support
Multiprocessor Software Architecture
 Hypervisors

 Introduction
 Architecture
 Configuration and Use
OpenAMP
 Overview
 Framework
 Using OpenAMP
Linux
 Components
 SMP: Introduction
 SMP: Configuration and Boot

Day 3

 Yocto

 Overview
 Build Workflow
 Relationship with PetaLinux
Open Source Library (Linux)
 Configuring and Building Linux
 PetaLinux and OSL Comparision
FreeRTOS
 Introduction
 Internals
    Implementation
Zynq UltraScale+ MPSoC Software Stack
 Introduction
 Software Stack
Zynq UltraScale+ MPSoC PMU
 PMU Debugging
 PMU Application Development
 PMU API
 PMUSystem Architecture
Zynq UltraScale+ MPSoC Power Management
 Overview
 Power Domains
Zynq UltraScale+ Booting
 Detecting a Failed Boot
First Stage Boot Loader
 Introduction and Debugging

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Scheduled Embedded Courses

Migrating to Vitis Embedded Software Development IDE
February 18 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to:▪ Develop and...

Zynq UltraScale+ MPSoC
February 23 - February 25: 09:00 am - 05:00 pm
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC...

Designing with the Versal ACAP: Architecture & Methodology
March 03 - March 05: 09:00 am - 05:00 pm
 After completing this comprehensive training, you will have thenecessary skills to:▪ Describe...

Designing with Versal AI Engine 1
March 11 - March 12: 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to:▪ Describe the...

Designing with the Versal ACAP: NoC
March 19 : 09:00 am - 05:00 pm
This course introduces the Versal™ ACAP network on chip (NoC) to users familiar with Xilinx...

Zynq UltraScale+ MPSoC
March 23 - March 25: 09:00 am - 05:00 pm
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC...

Designing with Versal AI Engine 2
March 30 - March 31: 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to:▪ Describe the...

Designing FPGAs Using the Vivado Design Suite 2
April 01 - April 02: 09:00 am - 05:00 pm
This course shows you how to build an effective FPGA design using synchronous design techniques,...

Designing FPGAs Using the Vivado Design Suite 3
April 06 - April 07: 09:00 am - 05:00 pm
This course demonstrated timing closure techniques, such are baselining, pipelining,synchronization...

Zynq UltraScale+ MPSoC
April 13 - April 15: 09:00 am - 05:00 pm
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.