Zynq UltraScale+ MPSoC 3/4 Days


Course Description
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family.

Level: Embedded System Architect 3

Course Duration: 3 (8 hour-days) or 4 (6 hour-days)

Price: $2400 or 24 Xilinx Training Credits
Course Part Number: EMBDZUP3

•Who Should Attend? – System architects, hardware designers and software developrs interested in understanding the capabilities and ecosystem of the Zynq UltraScale+ MPSoC device.

Prerequisites
 Familiarity with processor hardware architectures
    Familiarity with C
 Familiarity with embedded operating systems
Software Tools
 Vivado® Design Suite
Hardware emulation environment:
○ VirtualBox
○ QEMU
○ Ubuntu desktop
○ PetaLinux

Course Outline

Day 1

Zynq UltraScale+ MPSoC Application Processing Unit
 Overview
 Cortex A-53 Processor
 Architecture Extensions
 64-bit architecture features
 Exception handling
 Cache coherency
Zynq UltraScale+MPSoC Real-Time Processing Unit
    Introduction
 L1 and L2 Caches
 Clocking, Power and Reset
 TCM Architecture
AXI
 Introduction
 Variations
    Transactions
Zynq Ultrascale+ MPSOc System Protection
 System Memory Management Unit
 Peripheral Protection Unit
 Memory Protection Unit
Zynq UltraScale+ MPSoC Clocks and Resets
 Clocking
 PS Resets
Zynq UltraScale+ MPSoC PMU
 Introduction
 Hardware Architecture
 PMU and the IPI
Zynq UltraScale+ MPSoC Booting
 Boot and Configuration
 Boot Image
 First Stage Boot Loader (FSBL)

Day 2

 ARM TrustZone Technology

 Overview
 TrustZone Firmware
 TrustZone Hardware
QEMU
 Introduction
 Launching
 Bare-Metal Application Development and Debugging
 Linux Application Development and Debugging
Zynq UltraScale+ MPSoC HW-SW Virtualization
 Hypervisors: Introduction
    Virtualization Hardware Support
Multiprocessor Software Architecture
 Hypervisors

 Introduction
 Architecture
 Configuration and Use
OpenAMP
 Overview
 Framework
 Using OpenAMP

Day 3
    Linux
   
Components
    SMP:Introduction
    SMP: Configuration and Boot
 Yocto
 Overview
 Build Workflow
 Relationship with PetaLinux
Open Source Library (Linux)
 Configuring and Building Linux
 PetaLinux and OSL Comparision
FreeRTOS
 Introduction
 Internals
    Zynq UltraScale+ MPSoC Software Stack
 Introduction
 Software Stack
Zynq UltraScale+ MPSoC PMU
 PMU Application Development
 PMU API
Zynq UltraScale+ MPSoC Power Management
 Overview
 Power Domains
Zynq UltraScale+ Booting
 Detecting a Failed Boot
First Stage Boot Loader
 Debugging
    Secure Booting

PDF Version

Enroll Now

Scheduled Embedded Courses

*FREE Workshop! Vitis and PetaLinux
August 23 : 10:00 am - 05:00 pm
After completing this workshop, you will have the necessary skills to:▪ Create an extensible...

Designing w/the DFX Using the Vivado Design Suite
August 29 - August 30: 09:00 am - 05:00 pm
Check with your local Authorized Training Provider for the specifics of the in-class lab board or...

Using Xilinx Alveo Cards to Accelerate Dynamic Workloads
August 31 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have the necessary skills to:▪ Describe the...

*Confirmed to run! Designing w/Versal ACAP: Architecture & Methodology
September 06 - September 09: 11:00 am - 05:00 pm
 After completing this comprehensive training, you will have thenecessary skills to:▪ Describe...

Zynq UltraScale+ MPSoC
September 06 - September 09: 11:00 am - 05:00 pm
Course DescriptionThis course provides an overview of the capabilities and support for the Zynq®...

Designing with Versal AI Engine 3:Kernel Programming & Optimization
September 15 - September 16: 09:00 am - 05:00 pm
This course covers the advanced features of the Versal™ ACAP AI Engine, including debugging an...

Designing with the Versal ACAP: PCI Express System
September 19 - September 20: 09:00 am - 05:00 pm
Course OutlineDay 1 ▪ Introduction to PCI ExpressIntroduces the course and discusses a few key...

*FREE Workshop! Using Vision-based App w/ the Kria KV260 Vision AI Starter Kit & SOM
September 21 - September 22: 10:30 am - 04:00 pm
After completing this comprehensive training, you will have the necessary skills to: ▪ Describe the...

*Confirmed to run! Designing FPGAs Using the Vivado Design Suite 2
September 26 - September 27: 09:00 am - 05:00 pm
This course shows you how to build an effective FPGA design using synchronous design techniques,...

Embedded Design with PetaLinux Tools
September 29 - September 30: 09:00 am - 05:00 pm
Level: Embedded Software 4 Course Duration: 2 days Price: $1600 or 16 Xilinx Training Credits...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.