Zynq UltraScale+ MPSoC 3/4 Days

Course Description
This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family.
Level: Embedded System Architect 3
Course Duration: 3 (8 hour-days) or 4 (6 hour-days)
Price: $2400 or 24 Xilinx Training Credits
Course Part Number: EMBDZUP3
•Who Should Attend? – System architects, hardware designers and software developrs interested in understanding the capabilities and ecosystem of the Zynq UltraScale+ MPSoC device.
Prerequisites
Familiarity with processor hardware architectures
Familiarity with C
Familiarity with embedded operating systems
Software Tools
Vivado® Design Suite
Hardware emulation environment:
○ VirtualBox
○ QEMU
○ Ubuntu desktop
○ PetaLinux
Course Outline
Day 1
Zynq UltraScale+ MPSoC Application Processing Unit
Overview
Cortex A-53 Processor
Architecture Extensions
64-bit architecture features
Exception handling
Cache coherency
Zynq UltraScale+MPSoC Real-Time Processing Unit
Introduction
L1 and L2 Caches
Clocking, Power and Reset
TCM Architecture
AXI
Introduction
Variations
Transactions
Zynq Ultrascale+ MPSOc System Protection
System Memory Management Unit
Peripheral Protection Unit
Memory Protection Unit
Zynq UltraScale+ MPSoC Clocks and Resets
Clocking
PS Resets
Zynq UltraScale+ MPSoC PMU
Introduction
Hardware Architecture
PMU and the IPI
Zynq UltraScale+ MPSoC Booting
Boot and Configuration
Boot Image
First Stage Boot Loader (FSBL)
Day 2
ARM TrustZone Technology
Overview
TrustZone Firmware
TrustZone Hardware
QEMU
Introduction
Launching
Bare-Metal Application Development and Debugging
Linux Application Development and Debugging
Zynq UltraScale+ MPSoC HW-SW Virtualization
Hypervisors: Introduction
Virtualization Hardware Support
Multiprocessor Software Architecture
Hypervisors
Introduction
Architecture
Configuration and Use
OpenAMP
Overview
Framework
Using OpenAMP
Day 3
Linux
Components
SMP:Introduction
SMP: Configuration and Boot
Yocto
Overview
Build Workflow
Relationship with PetaLinux
Open Source Library (Linux)
Configuring and Building Linux
PetaLinux and OSL Comparision
FreeRTOS
Introduction
Internals
Zynq UltraScale+ MPSoC Software Stack
Introduction
Software Stack
Zynq UltraScale+ MPSoC PMU
PMU Application Development
PMU API
Zynq UltraScale+ MPSoC Power Management
Overview
Power Domains
Zynq UltraScale+ Booting
Detecting a Failed Boot
First Stage Boot Loader
Debugging
Secure Booting
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Scheduled Embedded Courses
Free Workshop! Migrating from ISE & Spartan 6 to Vivado & 7 Series
June 03 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have the necessary skills to:
▪ Analyze...
*FREE Workshop! Using Vision-based App w/ the Kria KV260 Vision AI Starter Kit & SOM
June 06 - June 07: 10:30 am - 04:00 pm
After completing this comprehensive training, you will have the necessary skills to:
▪ Describe the...
Zynq UltraScale+ MPSoC *Confirmed to run!
June 06 - June 09: 11:00 am - 05:00 pm
Course DescriptionThis course provides an overview of the capabilities and support for the Zynq®...
Designing FPGAs Using the Vivado Design Suite 3
June 09 - June 10: 09:00 am - 05:00 pm
This course demonstrated timing closure techniques, such are baselining,...
Designing with the IP Integrator Tool
June 17 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have the necessary skills to:▪ Describe the...
Accelerating Applications with the Vitis Unified Software Environment
June 20 - June 22: 09:00 am - 05:00 pm
After completing this comprehensive training, you will have the necessary skills to:▪ Describe how...
Designing with Versal AI Engine 2:Graph Programming w/AI Engine Kernels
July 07 - July 08: 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to:▪ Describe the...
Zynq UltraScale+ MPSoC
July 11 - July 14: 11:00 am - 05:00 pm
EMBDZUPMPSoC
Course DescriptionThis course provides an overview of the capabilities and support...
Designing w/the Xilinx Serial Transceivers
July 14 - July 15: 09:00 am - 05:00 pm
Learn how to employ serial transceivers in UltraScale™ and UltraScale+™ FPGA designs or Zynq®...
Designing with the Versal ACAP: PCI Express System
July 25 - July 26: 09:00 am - 05:00 pm
Course OutlineDay 1
▪ Introduction to PCI ExpressIntroduces the course and discusses a few key...
Alternative Dates and Locations
Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates. If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs. No obligation necessary.