Designing FPGAs w/the Vivado Design Tool 3 & 4

Course Description




Proficiency Stack Course Details
4 hours $600 or 6 Training Credits

You can have both the flexibility of On-Demand, with the expertise and interaction of Instructor-Led Xilinx training.


We are pleased to announce the “Proficiency Stack”. This structured training solution combines self paced, on-demand content, with course-specific 4-hr “Applied Learning Lab(s)” @ 4-week intervals


The Lab is led by a certified Xilinx training professional.


You gain the following:

1. Your individual questions are answered in a real-time, interactive format.

2. You get additional tips, demos, techniques, “best-practices” and FPGA design insights.

3. The value and application of your prior on-demand study is greatly enhanced.

4. Timely follow-up to your selfpaced learning experience, maximizing productivity.

The Proficiency Stack is ideal for:

1. New XPA and On-Demand Training Purchases.

2. Customers having taken prior on-demand training

3. Any customer wanting the benefit of concise expert instruction and interaction.

 

 "Applied Learning Labs" are 4 hours each and compliment the OnDemand courses. The OnDemand is not live or interactive, but when you attend the "Applied Learning Lab", a student can watch a live deep dive lab, explanation, techniques or ask specific questions from the OnDemand video

 

 

 "Applied Learning Lab" Description
Each 4-hour lab is an interactive follow-up to on-demand content.  

Each lab session is structured to maximize customer engagement.


5-minute welcome, establish basic rules to maximize interaction
30-45 minutes open Q&A (customer driven, informal customer polling*)
* Poll attendees on the initial experience with On-Demand content, determine focus areas/topics for “Applied Learning Lab” 
60 minute Lab1 deep dive demo, explanation, techniques, best practices (Selected lab from course)
15 minute break
60 minute Lab2 deep dive demo, explanation, techniques, best practices ( Or deep dive into a particular topic from the class, can also be customer driven.
45 minute presentation and review of key slides and take-aways from course PPT
10 minute open Q&A
Please come prepared to ask questions that facilitate your complete understanding and application of the on-demand content.

In addition, the certified Xilinx instructor will offer other tips, techniques and "Best Practices" for FPGA design.

Scheduled Embedded Courses

Free Workshop! Migrating from ISE & Spartan 6 to Vivado & 7 Series
June 03 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have the necessary skills to: ▪ Analyze...

*FREE Workshop! Using Vision-based App w/ the Kria KV260 Vision AI Starter Kit & SOM
June 06 - June 07: 10:30 am - 04:00 pm
After completing this comprehensive training, you will have the necessary skills to: ▪ Describe the...

Zynq UltraScale+ MPSoC *Confirmed to run!
June 06 - June 09: 11:00 am - 05:00 pm
Course DescriptionThis course provides an overview of the capabilities and support for the Zynq®...

Designing FPGAs Using the Vivado Design Suite 3
June 09 - June 10: 09:00 am - 05:00 pm
 This course demonstrated timing closure techniques, such are baselining,...

Designing with the IP Integrator Tool
June 17 : 09:00 am - 05:00 pm
After completing this comprehensive training, you will have the necessary skills to:▪ Describe the...

Accelerating Applications with the Vitis Unified Software Environment
June 20 - June 22: 09:00 am - 05:00 pm
After completing this comprehensive training, you will have the necessary skills to:▪ Describe how...

Designing with Versal AI Engine 2:Graph Programming w/AI Engine Kernels
July 07 - July 08: 09:00 am - 05:00 pm
After completing this comprehensive training, you will have thenecessary skills to:▪ Describe the...

Zynq UltraScale+ MPSoC
July 11 - July 14: 11:00 am - 05:00 pm
EMBDZUPMPSoC Course DescriptionThis course provides an overview of the capabilities and support...

Designing w/the Xilinx Serial Transceivers
July 14 - July 15: 09:00 am - 05:00 pm
Learn how to employ serial transceivers in UltraScale™ and UltraScale+™ FPGA designs or Zynq®...

Designing with the Versal ACAP: PCI Express System
July 25 - July 26: 09:00 am - 05:00 pm
Course OutlineDay 1 ▪ Introduction to PCI ExpressIntroduces the course and discusses a few key...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.