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Designing with the Zynq UltraScale+ RFSoC

This course is structured to provide designers with an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family. Special emphasis is placed on the Data Converter and Soft-Decision FEC blocks. Power estimation is covered to help designers identify the power demands of the device in various operating modes. Since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device, proper layout and PCB considerations are also covered.

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Designing with the Zynq UltraScale+ RFSoC Oct 15-16-2019-Utah
$1,600.00

Title: Zynq UltraScale+MPSoC-System Architect
Date/Duration: Oct 15-16-2019 Two days
Times: 9 AM - 5 PM CST
Location:  Utah, TBA

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Designing with the Zynq UltraScale+ RFSoC July 8-9, 2019 Online
$1,600.00

Title: Zynq UltraScale+MPSoC-System Architect
Date/Duration: July 8-9-2019 Two days
Times: 9 AM - 5 PM CST
Location:  ONLINE

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