Embedded Systems Design 

Course Description

This course is designed to bring FPGA designers up to speed on developing embedded systems using the Vivado Design Suite. The features and capabilities of both the Zynq All Programmable System on a Chip (SoC) and the MicroBlaze soft processor are covered in lectures and labs, in addition to general embedded concepts, tools, and techniques.The hands-on labs provide students with experience designing, expanding, and modifying an embedded system, including adding and simulating a custom AXI-based perphrial using bus functional model (BFM) simulation.

The Xilinx Zynq All Programmable SoC enables a new level of system design capabilities over previous embedded technologies and this is highlighted throughout the course.

 

Level: Embedded Hardware 3 
Course Duration: 2 days
Price: $1400 or 14 Xilinx Training Credits
Course Part Number: EMBD-HW-ILT 
Who Should Attend?: Engineers who are interested in developing embedded systems with the Xilinx Zynq All Programmable SoC or MicroBlaze soft proecessor core.
Registration: Register online in our secure store

Prerequisites

  • FPGA design experience
  • Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx Vivado software implementation tools
  • Basic understanding of C programming
  • Basic understanding of microprocessors
  • Some HDL modeling experience

Software Tools

  • Vivado Design or System Edition 2016.1

Hardware

  • Architecture: Zynq-7000 All Programmable SoC and 7 series FPGAs*
  • Demo board: Zynq-7000 All Programmable SoC ZC702 or ZedBoard or Kintex™-7 FPGA KC705 board*

* This course focuses on the Zynq-7000 All Programmable SoC and 7 series FPGA architectures. Contact us for the specifics of the in-class lab board or other customizations.

After completing this comprehensive training, you will have the necessary skills to:

  • Describe the various tools that encompass the Xilinx embedded design
  • Rapidly architect an embedded system containing a MicroBlaze™ or Cortex™-A9 processor using the Vivado IP Integrator and Customization Wizard.
  • Develop software applications utilizing the Eclipse-based Software Development Kit (SDK)
  • Create and integrate an IP-based processing system component in the Vivado Design Suite.
  • Design and add a custom AXI interface-based peripheral to the embedded processing system
  • Simulate custom AXI interface-based peripheral using a Bus Functional Model (BFM)

Course Outline

Day 1

  • Embedded UltraFast Design Methodology
  • Overview of Embedded Hardware Development
  • Driving the IP Integrator Tool (Lab)
  • Overview of Embedded Software Development
  • Driving the SDK Tool (Lab)
  • AXI: Introduction
  • AXI: Variations
  • AXI: Transactions (Lab)
  • Introduction to Interrupts
  • Interrupts: Hardware Architecture and Support

Day 2

  • AXI: Connecting AXI IP
  • Using the Create and Import Wizard to Create a NEw AXI IP (Lab)
  • AXI: BFM Simulation (Lab)
  • MircoBlaze Processor Atchitecture Overview (Lab)
  • MircoBlaze Processor Block Memory Usage
  • Zynq-7000 All Programmable SoC Architecture Overview (Lab)

Lab Descriptions

  • Driving the IP Integrator Tool: Introduction to the most commonly performed operations and capabilities of the Vivado IP Integrator tool.
  • Driving the SDK Tool: Introduction to the basic operations of SDK. Concepts such as project creation, adding existing source code to an application, compilation and linking, and downloading are covered.
  • Exploring AXI Transactions Using the AXI Traffic Generator: AXI4 transactions will be explored in the lab with special emphasis on AXI channels, handshaking, and the most useful signal members within the AXI interface. The AXI Traffic Generator (ATG) IP example design will serve as the basis of this lab. Simulation of the design will provide the sample AXI traffic to be studies.
  • Building Custom AXI IP: This lab guides you through the process of creating and adding a custom AXI perphrial to the Vivado IP catalog by using the Create and Package IP Wizard. The focus is on the process of adding an AXI interface onto an existing peripheral--not the actual design of the peripheral logic.
  • BFM Simulation: BFM simulations are used to generate bus stimulus and observe the response to that stimulus. Here you will learn how to run a BFM simulation for a custom peripheral.
  • Exploring the Architecture of the MicroBlaze Processor: Some of the configurable options in the MicroBlaze processor are introduced in this lab. You will learn how to instantiate and configure the MicroBlaze processor and use Designer Assistance to complete a design.
  • Exploring the Architecture of the Zynq-7000 All Programmable SoC: This introduction to the basic process of instantiating and customizing the processor system (PS) of the Zynq-7000 All Programmable SoC family of parts illustrates the process of customizing the PS. While not every aspect of customization is covered, the process provided here can be extended to all aspects of customization.

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Scheduled Embedded Courses

Embedded System Design 2017.1
June 26 - June 27: 09:00 am - 05:00 pm
v2017.1 The course is designed to bring FPGA designers up to speed on developing embedded systems...

Embedded Systems Software Design 2017.1
June 28 - June 29: 09:00 am - 05:00 pm
v2017.1 This two-day course introduces you to software design and development for the Xilinx Zynq...

Embedded Design with PetaLinux Tools
July 18 - July 19: 09:00 am - 05:00 pm
v2016.4 This intermediate-level, two-day course provides embedded systems developers with...

Using Vivado Logic Analyzer-Custom
July 20 : 09:00 am - 05:00 pm
This two-day online course is structured to provide software designers with a catalog of OS...

Zynq UltraScale+MPSoC-System Architect-Dallas
July 25 - July 26: 09:00 am - 05:00 pm
v1016.3 This two-day course is structured to provide system architects with an overview of the...

Zynq UltraScale+MPSoC-Software Developer
August 01 - August 02: 09:00 am - 05:00 pm
v2016.3 This two-day course is structured to provide software designers with a catalog of OS...

Designing FPGAs Using the Vivado Design Suite 2
August 15 - August 16: 09:00 am - 05:00 pm
v2016.3 This course shows you how to build an effective FPGA design using synchronous design...

Zynq UltraScale+MPSoC-System Architect-Dallas
August 29 - August 30: 09:00 am - 05:00 pm
v2016.3 This two-day online course is structured to provide system architects with an overview of...

Zynq UltraScale+MPSoC-Software Developer
August 31 - September 01: 09:00 am - 05:00 pm
v2016.3 This two-day course is structured to provide software designers with a catalog of OS...

Zynq UltraScale+MPSoC-Software Developer
August 31 - September 01: 09:00 am - 05:00 pm
v2016.3 This two-day course is structured to provide software designers with a catalog of OS...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.