Embedded Systems Design

Embedded System Design 

EMBD-HW-ILT

Course Description

This course is designed to bring FPGA designers up to speed on developing embedded systems using the Vivado® Design Suite. The features and capabilities of both the Zynq® All Programmable System on a Chip (SoC), Zynq UltraScale+™ MPSoC, and the MicroBlaze™ soft processor are covered in lectures, demonstrations, and labs, along with general embedded concepts, tools, and techniques. The hands-on labs provide students with experience designing, expanding, and modifying an embedded system, including adding and simulating a custom AXI-based peripheral. 

Level: Embedded Hardware 3
Course Duration: 2 days
Price: $1400 or 14 Xilinx Training Credits
Course Part Number: EMBD-HW-ILT
Who Should Attend?: Engineers who are interested in developing embedded systems with the Xilinx Zynq All Programmable SoC, Zynq UltraScale+ MPSoC, and/or MicroBlaze soft processor core 
Registration: Register online in our secure store

Prerequisites

 

  • FPGA design experience 
  • Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx Vivado® software implementation tools 
  • Basic understanding of C programming
  • Basic understanding of microprocessors 
  • Some HDL modeling experience 

 

 

Software Tools

  • Vivado Design or System Edition 2018.1

Hardware

  • Architectures: Zynq-7000 SoC (Cortex™-A9 processor), Zynq UltraScale+ MPSoC (Cortex-A53 and Cortex-R5 processors), and MicroBlaze processor* 
  • Demo board: Zynq-7000 SoC ZC702 or ZedBoard* 

 

 

 

After completing this comprehensive training, you will have the necessary skills to:

 

  • Describe the various tools that encompass a Xilinx embedded design 
  • Rapidly architect an embedded system containing a CortexA9/A53/R5 or MicroBlaze processor using the Vivado IP integrator and Customization Wizard 
  • Develop software applications utilizing the Eclipse-based Software Development Kit (SDK) 
  • Create and integrate an IP-based processing system component in the Vivado Design Suite
  • Design and add a custom AXI interface-based peripheral to the embedded processing system
  • Simulate a custom AXI interface-based peripheral using VIP 

 

 

Course Outline

Day 1

  • Embedded UltraFast Design Methodology {Lecture, Demo} 
  • Overview of Embedded Hardware Development {Lecture, Demo} 
  • Driving the IP Integrator Tool {Lecture, Lab} 
  • Overview of Embedded Software Development {Lecture} 
  • Driving the SDK Tool {Lecture, Lab} 
  • AXI: Introduction {Lecture} 
  • AXI: Variations {Lecture} 
  • AXI: Transactions {Lecture, Lab, Demo} 
  • Introduction to Interrupts {Lecture} 
  • Interrupts: Hardware Architecture and Support {Lecture}

Day 2

  • AXI: Connecting AXI IP {Lecture, Demo} 
  • Creating a New AXI IP with the Wizard {Lecture, Lab} 
  • AXI: BFM Simulation Using Verification IP (Lecture, Lab}
  • MicroBlaze Processor Architecture Overview {Lecture, Lab} 
  • MicroBlaze Processor Block Memory Usage {Lecture} 
  • Zynq-7000 All Programmable SoC Architecture Overview {Lecture, Lab, Demo} 
  • Zynq UltraScale+ MPSoC Architecture Overview {Lecture, Lab, Demo} 

 

 

Lab Descriptions

Day 1 

  • Embedded UltraFast Design Methodology – Outlines the different elements that comprise the Embedded Design Methodology. 
  • Overview of Embedded Hardware Development – Overview of the embedded hardware development flow. 
  • Driving the IP Integrator Tool – Describes how to access and effectively use the IPI tool. 
  • Overview of Embedded Software Development – Reviews the process of building a user application. 
  • ▪ Driving the SDK Tool – Introduces the basic behaviors required to drive the SDK tool to generate a debuggable C/C++ application. 
  • AXI: Introduction – Introduces the AXI protocol. 
  • AXI: Variations – Describes the differences and similarities among the three primary AXI variations. 
  • AXI: Transactions – Describes different types of AXI transactions. 
  • Introduction to Interrupts – Introduces the concept of interrupts, basic terminology, and generic implementation. 
  • Interrupts: Hardware Architecture and Support – Reviews the hardware that is typically available to help implement and manage interrupts. 

 Day 2 

  

  • AXI: Connecting AXI IP – Describes the relationships between different types of AXI interfaces and how they can be connected to form hierarchies. 
  • Using the Create and Import Wizard to Create a New AXI IP – Explains how to use the Create and Import Wizard to create and package an AXI IP. 
  • AXI: BFM Simulation Using Verification IP – Describes how to perform BFM simulation using the Verification IP. 
  • MicroBlaze Processor Architecture Overview – Overview of the MicroBlaze microprocessor architecture. 
  • MicroBlaze Processor Block Memory Usage – Highlights how block RAM can be used with the MicroBlaze processor. 
  • Zynq-7000 All Programmable SoC Architecture Overview – Overview of the Zynq-7000 All Programmable SoC architecture. 
  • Zynq UltraScale+ MPSoC Architecture Overview – Overview of the Zynq UltraScale+ MPSoC 

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Scheduled Embedded Courses

Zynq SoC System Architecture 2018.1
January 08 - January 09: 09:00 am - 05:00 pm
* This course focuses on the Zynq-7000 SoC. Check with your local Authorized Training Provider for...

Zynq UltraScale+MPSoC-System Architect-Online
January 10 - January 11: 09:00 am - 05:00 pm
This two-day online course is structured to provide system architects with an overview of the...

Zynq UltraScale+MPSoC-Software Developer-Online
February 07 - February 08: 09:00 am - 05:00 pm
This two-day course is structured to provide software designers with a catalog of OS implementation...

Zynq UltraScale+MPSoC-System Architect
February 14 - February 15: 09:00 am - 05:00 pm
This two-day online course is structured to provide system architects with an overview of the...

Designing FPGAs Using the Vivado Design Suite 2
February 26 - February 27: 09:00 am - 05:00 pm
v2016.3 This course shows you how to build an effective FPGA design using synchronous design...

Zynq UltraScale+MPSoC-Software Developer
February 28 - March 01: 09:00 am - 05:00 pm
v 2017.3 This two-day course is structured to provide software designers with a catalog of OS...

SDSoC Development Environment and Methodology
March 07 : 09:00 am - 05:00 pm
This one-day course is structured to help designers new to the SDSoC™ development environment to...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.