Embedded Design with PetaLinux Tools Spec Sheet  

Course Description

This intermediate-level, two-day course provides embedded systems developers with experience in creating an embedded Linux system targeting a Zynq® All Programmable System on a Chip (SoC) processor and Zynq UltraScale+™ MPSoC processor development board using PetaLinux Tools. The course offers students hands-on experience with building the environment and booting the system using a Zynq All Programmable SoC or Zynq UltraScale+ MPSoC design with PetaLinux Tools on the ARM® Cortex™-A9 or Cortex-A53 processor. This course also introduces embedded Linux components, use of opensource components, environment configurations, network components, and debugging options for embedded Linux platforms. The primary focus is on embedded Linux development in conjunction with the Xilinx tool flow

 

Level: Embedded Software 4 
Course Duration: 2 days
Price: $1400 or 14 Xilinx Training Credits
Course Part Number: EMBD-HW-ILT 
Who Should Attend?: Embedded software developers interested in customizing the PetaLinux kernel on an ARM processor design for a Xilinx Zynq All Programmable SoC or Xilinx Zynq UltraScale+ MPSoC .
Registration: Register online in our secure store

Prerequisites

  • Essentials of FPGA Design (introductory FPGA design course) 
  • Embedded Systems Software Development course (software development for FPGA embedded systems course) 

Software Tools

  • Vivado Design or System Edition 2017.3
  • PetaLinux Tools 2017.3

Hardware

  • Architecture: Zynq-7000 All Programmable SoC* 
  • Demo board: ZedBoard*; Xilinx ZCU102 Evaluation Board 

* This course focuses on the Zynq-7000 All Programmable SoC and Zynq UltraScale+ MPSoC architecture. Check with your local Authorized Training Provider for the specifics of the in-class lab board or other customizations.  Contact us for the specifics of the in-class lab board or other customizations.

After completing this comprehensive training, you will have the necessary skills to:

  • Describe the various tools that encompass the Xilinx embedded design
  • Rapidly architect an embedded system containing a MicroBlaze™ or Cortex™-A9 processor using the Vivado IP Integrator and Customization Wizard.
  • Develop software applications utilizing the Eclipse-based Software Development Kit (SDK)
  • Create and integrate an IP-based processing system component in the Vivado Design Suite.
  • Design and add a custom AXI interface-based peripheral to the embedded processing system
  • Simulate custom AXI interface-based peripheral using a Bus Functional Model (BFM)

Course Outline

Day 1

  • Embedded Linux Overview 
  • Lab 1: A First Look 
  • Introduction to the PetaLinux Tools 
  • Lab 2: Build and Boot an Image 
  • Application Development and Debugging 
  • Lab 3: Application Development and Debugging 
  • Networking and TCP/IP 
  • Lab 4: Networking and TCP/IP 
  • Device Drivers, User Space I/O, and Loadable Kernel Modules 
  • Lab 5: Accessing Hardware Devices from User Space 

Day 2

  • Board Bring Up with the Vivado Design Suite and PetaLinux Tools 
  • Lab 6: Basic Hardware Design with the Vivado Design Suite and PetaLinux Tools 
  • Custom Hardware Development and Interfacing 
  • Lab 7: Custom Hardware Development
  • Custom Driver Development (short review) 
  • Lab 8: Custom Driver Development 

Lab Descriptions

  • Lab 1: A First Look – Log in to the ARM processor Linux system and make comparisons between the embedded Linux and desktop Linux environments. 
  • Lab 2: Build and Boot an Image – Explore the Linux configuration menus and build the ARM processor Linux kernel and applications. Download the resulting system image to the development board.  
  • Lab 3: Application Development and Debugging – Create a simple user application with PetaLinux Tools and debug the application with System Debugger. 
  • Lab 4: Networking and TCP/IP – Explore the kernel configuration menu. Log in to the ARM processor Linux system by using telnet. Transfer files to and from Linux by using FTP. Build and experiment with web-based applications under Linux. 
  • Lab 5: Accessing Hardware Devices from User Space – Access a hardware device directly from user space. Use the UIO framework to access a hardware device. Experience loading and unloading kernel modules.  
  • Lab 6: Basic Hardware Design with the Vivado Design Suite and PetaLinux Tools – Use the Vivado IP integrator (IPI) to create a basic hardware design with the ARM Cortex-A9 or ARM Cortex-A53 processor. Use PetaLinux Tools to create a new embedded Linux target for the hardware design.  
  • Lab 7: Custom Hardware Development – Design a customized IP core. Integrate the IP core with the AXI interface and debug. 
  • Lab 8: Custom Driver Development – Write a UIO program to access the PWM AXI IP core. Boot from Flash and verify it on the target board

PDF version of this page.

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Scheduled Embedded Courses

Zynq UltraScale+MPSoC-System Architect-Longmont
July 31 - August 01: 09:00 am - 05:00 pm
This two-day online course is structured to provide system architects with an overview of the...

Zynq UltraScale+MPSoC-System Architect-Online
September 04 - September 05: 09:00 am - 05:00 pm
This two-day online course is structured to provide system architects with an overview of the...

Zynq SoC System Architecture 2018.1
September 06 - September 07: 09:00 am - 05:00 pm
* This course focuses on the Zynq-7000 SoC. Check with your local Authorized Training Provider for...

Zynq UltraScale+MPSoC-Software Developer
September 11 - September 12: 09:00 am - 05:00 pm
v 2017.3 This two-day course is structured to provide software designers with a catalog of OS...

Embedded System Design
September 27 - September 28: 09:00 am - 05:00 pm
v2018.1 The course is designed to bring FPGA designers up to speed on developing embedded systems...

Embedded Design with PetaLinux Tools
October 09 - October 10: 09:00 am - 05:00 pm
v2017.3 This intermediate-level, two-day course provides embedded systems developers with...

Designing FPGAs Using the Vivado Design Suite 2
October 11 - October 12: 09:00 am - 05:00 pm
v2017.1 This course shows you how to build an effective FPGA design using synchronous design...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.