Advanced Features and Techniques of Embedded Systems Design (EDK) | FTL

EMB HW 4 | EMBD33000-ILT (v1.0)

Course Description

Advanced Features and Techniques of Embedded Systems Design provides embedded systems developers the necessary skills to develop complex embedded systems and enables them to improve their designs by using the tools available in the Vivado IP Integrator. This course also helps developers understand and utilize advanced components of embedded systems design for architecting a complex system in the Zynq™ All Programmable System on a Chip (SoC) or Microblaze™ soft processor.

This course builds on the skills gained in the Embedded Systems Design course. Labs provide hands-on experience with developing, debugging, and simulating an embedded system. Utilizing memory resources and implementing high-performance DMA are also covered. Labs use demo boards in which designs are downloaded and verified.

Level: EMB HW 4
Course Duration: 2 days
Price: $1400 or 14 Xilinx Training Credits
Course Part Number: EMBD33000-ILT
Who Should Attend?: Hardware, firmware, and system design engineers who are interested in Xilinx embedded systems development flow
Registration: Register online in our secure store

Prerequisites

  • Embedded Systems Development course or experience with embedded systems design and the Vivado Design Suite
  • Basic C programming
  • Working knowledge of the Zynq All Programmable SoC or Microblaze processor

Software Tools

  • Vivado Design or System Edition 2013.2

Hardware

  • Architecture: Zynq-7000 All Programmable SoC and 7 series FPGAs*
  • Demo board: Zynq-7000 All Programmable SoC ZC702 or Zed or Kintex™-7 FPGA KC705 board*

* This course focuses on the Zynq-7000 All Programmable SoC and 7 series FPGA architectures. Contact us for the specifics of the in-class lab board or other customizations.

After completing this comprehensive training, you will have the necessary skills to:

  • Assemble an advanced embedded system
  • Take advantage of the various features of the Zynq All Programmable SoC and Kintex FPGAs, Cortex™-A9 and MicroBlaze™ processors, including the AXI interconnect, and the various memory controllers
  • Apply advanced debugging techniques, including the use of the Vivado logic analyzer tool for debugging an embedded system and HDL system simulation of processor-based designs
  • Identify the steps involved in integrating a memory controller into an embedded system using the Cortex-A9 and MicroBlaze processors
  • Integrate an interrupt controller and interrupt handler into an embedded design
  • Design a flash memory-based system and boot load from off-chip Flash memory
  • Perform HDL-based system simulation

Course Outline

Day 1

  • Embedded Systems Development Review
  • Lab 1: Sharing PS Resources with MicroBlaze Processor-- Hardware
  • Zynq All Programmable SoC Processing System Overview
  • Debugging Using the Runtime Logic Analyzer
  • Lab 2: Debugging on the Zynq All Programmable SoC
  • Block RAM and Memory Controllers
  • External Memory Controllers for Static Memory
  • Memory Controllers for Dynamic RAM
  • Lab 3: Extending Memory Space with Block RAM

Day 2

  • Interrupts
  • AXI Streaming Interface
  • System Data Movement: Low Latency and High Bandwidth
  • Advanced Processor and Peripheral Interface Options
  • Lab 4: Configuring DMA on Zynq All Programmable SoC
  • Advanced Processor Configurations
  • Software Boot and PL Configuration
  • Lab 5: Boot Loading from Flash Memory
  • HDL System Simulation with an Embedded Processor

Lab Descriptions

  • Lab 1: Share PS Resources with the MicroBlaze Processor- Develop hardware that incorporates the Zynq All Programmable SoC PS and MicroBlaze processor IP cores with interrupts enabled to interface to GPIO LEDs and serial communication. Use the SDK development tools to create an embedded software application project for the hardware build.
  • Lab 2: Debugging on the Zynq All Programmable SoC-Evaluate debugging the hardware and software components of a Zynq All Programmable SoC design.
  • Lab 3: Extending Memory Space with Block RAM- Use IP Integrator to extend the memory resources for the Cortex-A9 processor.  
  • Lab 4: Configuring DMA on the Zynq All Programmable SoC-Program the DMA controller on the Zynq All Programmable SoC PS and explore the various Standalone library services that support the ZynQ All Programmable SoC PS DMA controller.
  • Lab 5: Boot Loading from Flash Memory – Develop an application that is stored in flash memory, load it through a boot loader program, and execute a software application from external memory.

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Scheduled Embedded Courses

Zynq UltraScale+MPSoC-Software Developer-Online
October 24 - October 25: 09:00 am - 05:00 pm
v2017.1 This two-day course is structured to provide software designers with a catalog of OS...

Zynq UltraScale+MPSoC-System Architect-Online
October 26 - October 27: 09:00 am - 05:00 pm
v2017.1 This two-day online course is structured to provide system architects with an overview of...

Designing FPGAs Using the Vivado Design Suite 2
November 07 - November 08: 09:00 am - 05:00 pm
v2017.1 This course shows you how to build an effective FPGA design using synchronous design...

Designing FPGAs Using the Vivado Design Suite 3
November 09 - November 10: 09:00 am - 05:00 pm
This course demonstrated timing closure techniques, such are baselining, pipelining,synchronization...

Designing FPGAs Using the Vivado Design Suite 4
November 28 - November 29: 09:00 am - 05:00 pm
This course tackles the most sophisticated aspects of the Vivado Design Suite and Xilinx hardware....

Zynq UltraScale+MPSoC-Software Developer-Online
December 06 - December 07: 09:00 am - 05:00 pm
v 2016.3 This two-day course is structured to provide software designers with a catalog of OS...

Zynq UltraScale+MPSoC-System Architect-Online
December 12 - December 13: 09:00 am - 05:00 pm
This two-day online course is structured to provide system architects with an overview of the...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.