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Embedded Systems Design

EMB HW 3 | EMBD21000-14-ILT (v1.0)

Course Description

The Xilinx Zynqâ„¢ Extensible Processing Platform (EPP) provides a new level of system design capabilities. This course brings experienced FPGA designers up to speed on developing embedded systems using the Embedded Development Kit (EDK). The features and capabilities of the Zynq EPP as well as concepts, tools, and techniques are included in the lectures and labs. The hands-on labs provide students with experience designing, expanding, and modifying an embedded system, including adding and simulating a custom AXI-based peripheral.

Additionally, the features and capabilities of the Xilinx MicroBlazeâ„¢ soft processor are also included in the lectures and labs.

Level: EMB HW 3
Course Duration: 2 days
Price: $1200 or 12 Xilinx Training Credits
Course Part Number: EMBD21000-14-ILT
Who Should Attend?: Engineers who are interested in developing embedded systems with the Xilinx Zynq EPP or MicroBlaze soft processor core using the Embedded Development Kit
Registration: Register online in our secure store

Prerequisites

  • FPGA design experience
  • Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
  • Basic understanding of C programming
  • Basic understanding of microprocessors
  • Some HDL modeling experience

Software Tools

  • Xilinx ISE Design Suite: Embedded or System Edition 14.1

Hardware

  • Architecture: Zynq-7000 EPP and 7 series, Spartan®-6, and Virtex-6 FPGAs*
  • Demo board: Zynq-7000 EPP ZC702 or Spartan-6 FPGA SP605*

* This course focuses on the Zynq-EPP, 7 series, Spartan-6, and Virtex-6 FPGA architectures. Contact us for the specifics of the in-class lab board or other customizations.

After completing this comprehensive training, you will have the necessary skills to:

  • Describe the various tools that encompass the Xilinx Embedded Development Kit (EDK)
  • Rapidly architect an embedded system containing a MicroBlazeâ„¢ or Cortexâ„¢-A9 processor by using the Base System Builder (BSB) or PS Configuration Wizard
  • Utilize the Eclipse-based Software Development Kit (SDK) to develop software applications and debug software
  • Create and integrate your own IP into the embedded processing environment
  • Simulate your custom AXI interface-based peripheral by using a Bus Functional Model (BFM)

Course Outline

Day 1

  • EDK Overview
  • Base System Builder and the Processing System Configuration Wizard
  • Lab 1: Hardware Construction with the Base System Builder or Processing System Configuration Wizard
  • Software Development Using SDK
  • Lab 2: Adding and Downloading Software
  • Introduction to AXI
  • Interrupts
  • Adding Hardware to an Embedded Design
  • Lab 3: Adding IP to a Hardware Design

Day 2

  • MicroBlaze Processor Basics
  • Cortex-A9 Processor Basics
  • Designing Your Own AXI Peripheral Using the IPIC Interface
  • Adding Your Own Peripheral to the IP Catalog
  • Lab 4: Building Custom AXI IP for an Embedded System
  • Bus Functional Model Simulation
  • Lab 5: BFM Simulation
  • Adding Your Own IP to the Embedded System
  • Lab 6: Integrating a Custom Peripheral

Lab Descriptions

  • Lab 1: Hardware Construction with the Base System Builder (Microblaze Processor) or Processing System Configuration Wizard (Zynq EPP) – Create an XPS project by using a wizard to develop a basic hardware system and generate a series of netlists for the embedded design.
  • Lab 2: Adding and Downloading Software – Complete the processes begun in Lab 1 using the SDK tools to create a software BSP and sample application. Configure the device and download the application.
  • Lab 3: Adding IP to a Hardware Design – Add IP to an existing processing system using the System Assembly View in Xilinx Platform Studio. Configure the device and download the application
  • Lab 4: Building Custom AXI IP for an Embedded System – Create and add a custom AXI peripheral (LCD interface) to your design by using the Create and Import Peripheral Wizard.
  • Lab 5: BFM Simulation – Use the ISim simulator to perform Bus Functional Model simulation to verify functionality of the LCD bus peripheral added in the preceding lab.
  • Lab 6: Integrating a Custom Peripheral – Put it all together: add custom IP to the design project, then integrate the processor sub-system with other logic in an ISE software design project.

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Scheduled Embedded Courses

Zynq EPP System Architecture v14.1
June 28 - June 29: 09:00 am - 05:00 pm
The Xilinx Zynqâ„¢ Extensible Processing Platform (EPP) provides a new level of system design...

Zynq EPP System Architecture v14.1
July 19 - July 20: 09:00 am - 05:00 pm
The Xilinx Zynqâ„¢ Extensible Processing Platform (EPP) provides a new level of system design...

Zynq EPP System Architecture v14.1
July 26 - July 27: 09:00 am - 05:00 pm
The Xilinx Zynqâ„¢ Extensible Processing Platform (EPP) provides a new level of system design...

Zynq EPP System Architecture v14.1
August 07 - August 08: 09:00 am - 05:00 pm
The Xilinx Zynqâ„¢ Extensible Processing Platform (EPP) provides a new level of system design...

Zynq EPP Embedded System Design v14.1
August 14 - August 15: 09:00 am - 05:00 pm
The Xilinx Zynqâ„¢ Extensible Processing Platform (EPP) provides a new level of system design...

Zynq EPP Embedded System Software Design v14.1
August 16 - August 17: 09:00 am - 05:00 pm
This two-day course introduces you to software design and development for the Xilinx Zynqâ„¢...

Alternative Dates and Locations

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes listed above or if none of the classes are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.