Xilinx Training Courses

Faster Technology is the Xilinx Authorized Training Provider (ATP) for the South Central (Texas, Louisiana, Oklahoma, and Arkansas) and Rocky Mountain (Colorado, Utah, Montana, and Wyoming) regions of the United States.

As a Xilinx ATP, Faster Technology delivers the following full line of Xilinx training courses in the areas of FPGA Design, Embedded Systems Development, Connectivity, DSP Design, Languages, and CPLD Design.

(Click on the following links for course specific information)

FPGA Design Courses

• Essentials of FPGA Design v13.3
• Designing for Performance v13.3
• Advanced FPGA Implementation v13.3
• Designing with the Spartan-6 and Virtex-6 Families v13.1
• Designing with the Spartan-6 Family v13.1
• Designing with the Virtex-6 Family v13.1
• Designing with the 7 Series Families v13.3
• Essential Design with the PlanAheadâ„¢ Analysis and Design Tool v13.1
• Advanced Design with the PlanAheadâ„¢ Analysis and Design Tool v13.1
• ISE® Design Tool Flow v13.3
• Debugging Techniques Using the ChipScopeâ„¢ Pro Tools v13.1
• Design Techniques for Lower Cost v8.1
• Partial Reconfiguration Tools and Techniques v13.1
• FPGA Power Optimization v13.1

Embedded Systems Development 

• Essentials of Microprocessors v13.1
• C Language Programming with SDK v13.1
• How to Design a Xilinx Embedded System in 1 Day v13.1
• Embedded Systems Development v13.1
• Advanced Features and Techniques of Embedded Systems Development v13.1
• Embedded Systems Software Development v13.1 
• Embedded Open-Source Linux Development v11.1
• Embedded Design with PetaLinux SDK v13.2
• Embedded System Hardware Design Workshop v13.1
• Embedded System Software Design Workshop v13.1

Connectivity Courses 

• How to Design a Xilinx Connectivity System in 1 Day v13.1
• PCIe Protocol Overview v13.1
• Designing a LogiCORE PCI Express® System v13.1
• Designing with Multi-Gigabit Serial I/O v13.1
• Signal Integrity and Board Design for Xilinx FPGAs v13.1
• How to Design a High-Speed Memory Interface v13.2
• Designing with Ethernet MAC Controllers v13.3

DSP Design Courses 

• DSP Design Using System Generator v13.1
• How to Design a Xilinx Digital Signal Processing System in 1 Day v13.1
• Essential DSP Implementation Techniques for Xilinx FPGAs v13.3

Language Courses

• Designing with Verilog v13.3
• Designing with VHDL v13.3
• Advanced VHDL v13.3

CPLD Courses 

• Fundamentals of CPLD Design v9.1
• Designing for Performance for CPLDs v9.1

Private Classes 

• Custom On-Site Training

See a list of all currently scheduled courses.

Faster Technology is able to deliver both private classes at client sites and also public classes at alternate locations and dates.  If there are no currently scheduled classes that are convenient, please tell us what dates and locations will meet your needs.  No obligation necessary.

Student Cancellation Policy

Student cancellations received more than 7 days before the first day of class are entitled to a 100% refund. Refunds will be processed within 14 days.

Student cancellations received less than 7 days before the first day of class are entitled to a 100% credit toward a future class.

Student cancellations must be sent to registrar(at)fastertechnology.com

Faster Technology Course Cancellation Policy

Due to low class size and other certain considerations, Faster Technology may cancel a class up to 7 days before the scheduled start date of the class.  In such cases, all students will be entitled to a 100% refund.  Faster Technology will notify registered students of "at risk" classes prior to cancellation.

Under no circumstances is Faster Technology responsible or liable for travel, lodging or other incidental costs. Please be aware of this cancellation policy when making your arrangements.