Event

Title:

Embedded System Design

Start date:

October 26

End date:

- October 27

Start time:

09:00 am

End time:

05:00 pm

Location:

Online

Registration:

Description:

The emphasis is on:
▪ Designing, expanding, and modifying embedded systems utilizing
the features and capabilities of the Zynq® System on a Chip
(SoC), Zynq UltraScale+™ MPSoC, or MicroBlaze™ soft
processor
▪ Adding and simulating AXI-based peripherals using bus functional
model (BFM) simulation

Course Outline 2020.1

Day 1

Embedded UltraFast Design Methodology
Outlines the different elements that comprise the Embedded
Design Methodology. {Lecture, Demo}
▪ Overview of Embedded Hardware Development
Overview of the embedded hardware development flow. {Lecture,
Demo}
▪ Driving the IP Integrator Tool
Describes how to access and effectively use the IPI tool. {Lecture,
Lab}
▪ Overview of Embedded Software Development
Reviews the process of building a user application. {Lecture}
▪ Driving the SDK Tool
Introduces the basic behaviors required to drive the SDK tool to
generate a debuggable C/C++ application. {Lecture, Lab}
▪ AXI: Introduction
Introduces the AXI protocol. {Lecture}
▪ AXI: Variations
Describes the differences and similarities among the three
primary AXI variations. {Lecture}
▪ AXI: Transactions
Describes different types of AXI transactions. {Lecture, Lab,
Demo}
▪ Introduction to Interrupts
Introduces the concept of interrupts, basic terminology, and
generic implementation. {Lecture}
▪ Interrupts: Hardware Architecture and Support
Reviews the hardware that is typically available to help implement
and manage interrupts. {Lecture}

Day 2

AXI: Connecting AXI IP
Describes the relationships between different types of AXI
interfaces and how they can be connected to form hierarchies.
{Lecture, Demo}
▪ Creating a New AXI IP with the Wizard
Explains how to use the Create and Import Wizard to create and
package an AXI IP. {Lecture, Lab}
▪ AXI: BFM Simulation Using Verification IP
Describes how to perform BFM simulation using the Verification
IP. {Lecture, Lab}
▪ MicroBlaze Processor Architecture Overview
Overview of the MicroBlaze microprocessor architecture.
{Lecture, Lab}
▪ MicroBlaze Processor Block Memory Usage
Highlights how block RAM can be used with the MicroBlaze
processor. {Lecture}
▪ Zynq-7000 SoC Architecture Overview
Overview of the Zynq-7000 SoC architecture. {Lecture, Demo,
Lab}
▪ Zynq UltraScale+ MPSoC Architecture Overview
Overview of the Zynq UltraScale+ MPSoC architecture. {Lecture,
Demo, Lab}

Event

Course Outline 2020.1

Day 1

Day 2

More Details